– Commercial –

Location: Bengaluru

Firm: Intel

• Develops the logic design, register switch degree (RTL) coding, and simulation for an IP required to generate cell libraries, useful items, IP blocks, and subsystems for integration in full chip designs. Participates within the definition of structure and microarchitecture options of the block being designed.
• Applies varied methods, instruments, and strategies to jot down RTL and optimize logic to qualify the design to satisfy energy, efficiency, space, and timing targets in addition to design integrity for bodily implementation.
• Opinions the verification plan and implementation to make sure design options are verified appropriately and resolves and implements corrective measures for failing RTL exams to make sure correctness of options.
• Helps SoC prospects to make sure high-quality integration and verification of the IP block. Drives high quality assurance compliance for clean IP-SoC handoff.